[SIGOPS 0820] The Reuse Cache: Downsizing the Shared Last-Level Cache

A considerable portion of the shared last-level cache (SLLC) is dead, meaning that the corresponding cache lines are stored, but they would not receive any further hits before being replaced.

This paper propose a new concept of cache, 'reuse cache', a decoupled tag/data SLLC which is designed to only store the data lines that have been reused.

The result is that a reuse cache with a tag array equivalent to a conventional 4 MB, and only a 1 MB data array would perform as well as a conventional cache of 8 MB, requiring only 16.7% the storage capacity.

For reused cache line, they suggest to decrease to one out of eight data array size and tag array in half.

원래 Tag와 Data array의 1:1 맵핑을 끊고,
First access는 tag에만, Second에부터 data까지 올린다.

Lower re-usability due to the fact, now, L1, L2 cache size is getting bigger than before.

왜 이런 환경이 생겼을까? L1, L2 사이즈의 증가로?
재사용되는 것만 캐시라인에 해놓게 되면 과연 Total hit를 Cover할 수 있을까?

Shared Memory Multiprocessors - http://blog.naver.com/kakapower/68684382


CMP vs SMP

- Multi-processors prior to multi-cores executes with many processors sharing bus and large memory, so each processor has independent cache. This is SMP(Symmetric Multiprocessor)

- a lot of cores in a chip

http://www.imaso.co.kr/?doc=bbs/gnuboard.php&bo_table=article&wr_id=33652